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5G Polar Coding Encoding Tutorial 

This tutorial explains the polar encoding stage of 5G NR polar coding based on 3GPP TS 38.212 section 5.3.1.2. The input to this stage is the interleaved sequence c'. The output is the encoded codeword d.

Sections

Mathematical Foundation

3GPP defines a master polar reliability sequence:

Q_0^{Nmax-1} = {Q_0^{Nmax}, Q_1^{Nmax}, ..., Q_{Nmax-1}^{Nmax}}

where Nmax = 1024. This table is 38.212 Table 5.3.1.2-1. It orders bit indices from least reliable to most reliable.

For a smaller mother-code length N, the simulator forms:

Q_0^{N-1} = subset of Q_0^{Nmax-1} containing only values less than N

The order is preserved. Therefore, the last positions of Q_0^{N-1} are the most reliable bit channels.

specific example: N = 32

scan full table by W: W=0 gives Q=0 -> keep because 0 < 32

W=1 gives Q=1 -> keep; W=2 gives Q=4 -> keep; W=3 gives Q=8 -> keep

W=6 gives Q=32 -> skip because 32 is not less than 32

the kept Q values, in scan order, become Q_0^31 for N=32

Set Construction

3GPP denotes the selected information/parity positions as Q_I^N and the remaining frozen positions as Q_F^N.

|Q_I^N| = K + n_PC

|Q_F^N| = N - |Q_I^N|

In this tutorial, Q_I^N is selected as the K + n_PC most reliable positions, i.e. the last K + n_PC entries of Q_0^{N-1}. Every position not in Q_I^N is frozen and set to zero.

specific example: N = 32, K = 16, n_PC = 0

|Q_I^N| = K + n_PC = 16 + 0 = 16

Q_I^N = last 16 entries of Q_0^31

Q_F^N = the other 16 positions, and those u_n values are frozen to 0

Parity Check Placement

If n_PC = 0, there are no parity-check positions and every index in Q_I^N carries one input bit from c'.

If n_PC > 0, 3GPP places parity-check bits inside Q_I^N. A number of n_PC - n_PC^wm PC bits are placed in the least reliable indices of Q_I^N. The remaining n_PC^wm PC bits are placed in indices with minimum row weight w(g_j) of the generator matrix row. If multiple candidates have the same minimum row weight, the most reliable among them is selected.

For the polar generator matrix G_N = (G_2)^⊗n, this tutorial computes the row weight (number of ones in row j) as:

w(gj) = 2popcount(j)

specific example: N = 32, K = 13, n_PC = 3, n_PC^wm = 1

|Q_I^N| = K + n_PC = 13 + 3 = 16

first n_PC - n_PC^wm = 3 - 1 = 2 PC bits go to the two least reliable positions inside Q_I^N

the remaining 1 PC bit is selected among Q_I^N positions with minimum w(g_j)

example row weight: if j = 24, popcount(24) = popcount(11000b) = 2, so w(g_24) = 2^2 = 4

Generating u

The vector u = [u_0 u_1 ... u_{N-1}] is generated by scanning n = 0 ... N-1.

If n is frozen, then:

u_n = 0

If n is a data position, then:

u_n = c'_k

If n is a PC position, then:

u_n = y_0

where y_0 ... y_4 are the five parity shift-register states shown in the 3GPP algorithm. The simulator shows the active y state and the exact equation for each u_n.

specific example: assume n = 6 is a data position and the next interleaved bit is c'_0 = 1

then u_6 = c'_0 = 1, and k advances from 0 to 1

if n = 7 is frozen, then u_7 = 0 and k does not advance

if n = 10 is a PC position and current y0 = 1, then u_10 = y0 = 1

Final Polar Transform

The output codeword is the U-vector times the polar generator matrix (the n-fold Kronecker power of the 2×2 Aríkan kernel):

d = u GN,   GN = (G2)⊗n,   G2 = [[1, 0], [1, 1]]

The encoding is performed over GF(2), so addition means XOR. The simulator implements this as a butterfly network.

specific example: N = 32 = 2^5

therefore G_32 = (G_2)^⊗5, so the butterfly has 5 stages: s1, s2, s3, s4, s5

one butterfly operation is upper = upper XOR lower, e.g. 1 XOR 0 = 1 or 1 XOR 1 = 0

after all 5 stages, the final vector is d = uG_32

Simulation

The interactive simulator is below. Use the controls to explore the concepts described above.

32
16
0
0
0/1
1. Q_N
2. Q_I/Q_F
3. PC placement
4. u and d

Reliability Table: Q_0^N from 38.212 Table 5.3.1.2-1

Frozen Data PC

Full 38.212 Table 5.3.1.2-1: Polar sequence Q_0^Nmax-1

Each row below is one element of the 1024-entry master reliability sequence.
W is the reliability rank in the master table. Q is the bit index at that rank.
To construct the current reliability table, scan this master table from W = 0 upward and keep only entries where Q < N.

Current u_n Formula (c' vector = output of interleaving)

u Vector

Polar Transform Visualization

bit value 1 bit value 0 XOR connection active row

Output Codeword d

Summary

 

Usage Instructions

  1. Choose a preset: Start with Small N=32 K=16 no PC to see plain data/frozen construction, then try PC example.
  2. Read the reliability table: Rank 0 is least reliable. The last K+nPC rows become Q_I^N. The rest become frozen positions Q_F^N.
  3. Step through n: Use Step Fwd and Step Bwd. The highlighted row and highlighted u_n cell follow the current index.
  4. Watch the formula: The current formula tells whether the active index is frozen, data, or PC and shows how u_n is assigned.
  5. Enable PC bits: Increase nPC. Yellow cells are parity-check positions selected according to the least-reliable and minimum-row-weight rules.
  6. Read the transform: The butterfly diagram represents d = uG_N over GF(2). The output ribbon shows the final encoded bits.

Important Notes & Limitations

  • Encoding stage only. The tool starts from the already-interleaved sequence c' and stops at the codeword d. CRC/PC attachment upstream, rate matching downstream, and the decoder are not part of this view (see [[polarcoding]] for the full pipeline).
  • Small N for readability. Examples are kept to N = 16, 32, 64 so bit positions and the butterfly stay legible; production polar codes go up to N = 1024 where the diagram would be unreadable.
  • Tutorial-scale PC placement. The parity-check placement (least-reliable + minimum-row-weight rules) follows 3GPP logic but at illustrative scale; it shows why PC bits are interleaved into reliable positions rather than reproducing every spec corner case.
  • Fixed reliability sequence. The frozen/info split uses only the single 3GPP master reliability table (5.3.1.2-1); no channel-adaptive or density-evolution frozen-set design.
  • Noiseless, bit-exact algebra. Everything is computed over GF(2) with no channel, LLRs, or errors — it demonstrates the deterministic transform, not coded BLER performance.
  • Uplink-oriented parameters. K and nPC ranges follow the PUCCH/PUSCH-style construction; the downlink (PBCH/PDCCH) path differs and is not covered.